/**
 * @file    Mcu_Types.h
 * @version
 *
 * @brief   AUTOSAR Mcu module interface
 * @details API implementation for Mcu driver
 *
 * @addtogroup MCU_MODULE
 * @{
 */
/*==================================================================================================
 *   Project              : YTMicro AUTOSAR 4.4.0 MCAL
 *   Platform             : ARM
 *   Peripheral           : Mcu
 *   Dependencies         : none
 *
 *   Autosar Version      : V4.4.0
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : V0.8.0
 *
 *
 *   (c) Copyright 2020-2026 Yuntu Microelectronics co.,ltd.
 *   All Rights Reserved.
==================================================================================================*/
#ifndef MCU_TYPES_H
#define MCU_TYPES_H

#ifdef __cplusplus
extern "C"
{
#endif

/*==================================================================================================
 *                                           INCLUDE FILE
==================================================================================================*/
#include "Mcu_Cfg.h"

/*==================================================================================================
 *                                  HEADER FILE VERSION INFORMATIO
==================================================================================================*/
#define MCU_VENDOR_ID                      (0xB4)
#define MCU_AR_RELEASE_MAJOR_VERSION       (4)
#define MCU_AR_RELEASE_MINOR_VERSION       (4)
#define MCU_AR_RELEASE_REVISION_VERSION    (0)
#define MCU_SW_MAJOR_VERSION               (0)
#define MCU_SW_MINOR_VERSION               (8)
#define MCU_SW_PATCH_VERSION               (0)

/*==================================================================================================
 *                                        FILE VERSION CHECK
==================================================================================================*/
/* Mcu_Cfg.h version check */
#if (MCU_VENDOR_ID != MCU_VENDOR_ID_CFG)
#error "Mcu_Types.h and Mcu_Cfg.h have different vendor ids"
#endif

#if ((MCU_AR_RELEASE_MAJOR_VERSION != MCU_AR_RELEASE_MAJOR_VERSION_CFG) || \
     (MCU_AR_RELEASE_MINOR_VERSION != MCU_AR_RELEASE_MINOR_VERSION_CFG) || \
     (MCU_AR_RELEASE_REVISION_VERSION != MCU_AR_RELEASE_REVISION_VERSION_CFG) \
    )
#error "AutoSar Version Numbers of Mcu_Types.h and Mcu_Cfg.h are different"
#endif

#if ((MCU_SW_MAJOR_VERSION != MCU_SW_MAJOR_VERSION_CFG) || \
     (MCU_SW_MINOR_VERSION != MCU_SW_MINOR_VERSION_CFG) || \
     (MCU_SW_PATCH_VERSION != MCU_SW_PATCH_VERSION_CFG) \
    )
#error "Software Version Numbers of Mcu_Types.h and Mcu_Cfg.h are different"
#endif 

/*==================================================================================================
 *                                        DEFINES AND MACRO
==================================================================================================*/
/**
 * @defgroup MCU_PCU_LVD_Macros Pcu LVD Macro Definitions
 * @brief Macros for LVD (Low Voltage Detection) and BOR (Brown-Out Reset) configuration in PCU module.
 * @{
 */
#define MCU_BOR_ENABLE_MASK        (0x01U << 0U) /**< Brown-Out Reset (BOR) detection. */
#define MCU_BOR_LPM_ENABLE_MASK    (0x01U << 1U) /**< BOR detection in Low Power mode. */
#define MCU_LVD5V_ENABLE_MASK      (0x01U << 2U) /**< LVD (Low Voltage Detection). */
#define MCU_LVD5V_LPM_ENABLE_MASK  (0x01U << 3U) /**< LVD enter LPM. */
#define MCU_LVD5V_RESET_MASK       (0x01U << 4U) /**< LVD Reset output. */
#define MCU_LVD5V_FILTER_MASK      (0x01U << 5U) /**< LVD input filter. */
#define MCU_LVD5V_INT_ENABLE_MASK  (0x01U << 6U) /**< LVD interrupt output. */
/** @} */ // end of MCU_PCU_LVD_Macros

/**
 * @defgroup MCU_PCU_Notification_Idx Pcu Notification Index Macros
 * @brief Index values used for PCU LVD/HVD notification array mapping.
 * @{
 */
#if defined (CPU_YTM32B1MD2) || defined (CPU_YTM32B1MC0)
#define MCU_PCU_LVD5V_NOTIFICATION_IDX    (0U)
#elif defined (CPU_YTM32B1ME1)
#define MCU_PCU_HVD50_NOTIFICATION_IDX    (0U)
#define MCU_PCU_LVD50_NOTIFICATION_IDX    (1U)
#define MCU_PCU_LVD12_NOTIFICATION_IDX    (2U)

#else
#define MCU_PCU_HVD11_NOTIFICATION_IDX    (0U)
#define MCU_PCU_HVD25_NOTIFICATION_IDX    (1U)
#define MCU_PCU_HVD50_NOTIFICATION_IDX    (2U)
#endif
/** @} */ // end of MCU_PCU_Notification_Idx

#if defined (CPU_YTM32B1MD2)
#define MCU_CMU_FLAG_MASK          (0x1111U)
#else
#define MCU_CMU_FLAG_MASK          (0x0111U)
#endif

/**
 * @defgroup MCU_CMU_FLAG Mcu CMU FLAG MASK Macro Definitions
 * @brief Macros for CMU (Clock Monitor Unit)
 * @{
 */
#define MCU_CMU_OUTRNG_FLAG_MASK   (0x01U)
#define MCU_CMU_LOSR_FLAG_MASK     (0x01U << 8U)
#define MCU_CMU_LOSC_FLAG_MASK     (0x01U << 16U)
#define MCU_CMU_LOSV_FLAG_MASK     (0x01U << 24U)
/** @} end of MCU_CMU_FLAG */

/**
 * @defgroup MCU_SYSTEM_CLOCK_SOURCE Mcu system clock type macro definitions
 * @brief The fellowing macro is used to convert unsigned int to Mcu_SystemClockSourceType.
 * @{
 */
#define MCU_CLOCK_SOURCE_FIRC           (0U)
#define MCU_CLOCK_SOURCE_PLL            (1U)
#define MCU_CLOCK_SOURCE_FXOSC          (2U)
#define MCU_CLOCK_SOURCE_SIRC           (3U)

#if (MCU_HAS_SXOSC == STD_ON)
#define MCU_CLOCK_SOURCE_SXOSC          (4U)
#endif
/** @} end of MCU_SYSTEM_CLOCK_SOURCE */

/**
 * @defgroup MCU_RAM_WRITE_SIZE_TYPE Mcu ram write size type macro definitions
 * @brief The fellowing macro is used to define RAM section write size.
 * @{
 */
#define MCU_RAM_WRITE_SIZE_8            (8U)
#define MCU_RAM_WRITE_SIZE_4            (4U)
#define MCU_RAM_WRITE_SIZE_2            (2U)
#define MCU_RAM_WRITE_SIZE_1            (1U)
/** @} end of MCU_RAM_WRITE_SIZE_TYPE */



/*==================================================================================================
 *                                               ENUM
==================================================================================================*/
/**
 * @brief          This enumeration type is used to enumerate the status of the PLL clock.
 * @autosar        SWS_Mcu_00250
 */
typedef enum
{
    MCU_PLL_LOCKED                 = 0U,  /**< PLL is locked */
    MCU_PLL_UNLOCKED               = 1U,  /**< PLL is unlocked */
    MCU_PLL_STATUS_UNDEFINED       = 2U,  /**< reverse */
} Mcu_PllStatusType;

#if (MCU_GET_SXOSC_STATUS_API == STD_ON)
/**
 * @brief          This enumeration type is used to enumerate the status of the Sxosc clock.
 * @autosar        N/A
 */
typedef enum
{
    MCU_SXOSC_INVALID              = 0U,  /**< Sxosc is unlocked */
    MCU_SXOSC_VALID                = 1U,  /**< Sxosc is locked */
} Mcu_SxoscStatusType;
#endif

/**
 * @brief          This enumeration type is used to enumerate the system clock sources of the Mcu.
 * @autosar        N/A
 */
typedef enum
{
    MCU_SYSTEM_CLOCK_SOURCE_FIRC   = 0U,  /**< Choose FIRC as system clock */
    MCU_SYSTEM_CLOCK_SOURCE_PLL    = 1U,  /**< Choose PLL as system clock */
    MCU_SYSTEM_CLOCK_SOURCE_FXOSC  = 2U,  /**< Choose FXOSC as system clock */
    MCU_SYSTEM_CLOCK_SOURCE_SIRC   = 3U,  /**< Choose SIRC as system clock */
} Mcu_SystemClockSourceType;

/**
 * @brief          This enumeration type is used to enumerate the system clock output sources of the Mcu.
 * @autosar        N/A
 */
#if defined(CPU_YTM32B1MD1) || defined(CPU_YTM32B1ME0)
typedef enum
{
    MCU_CLOCK_OUT_SOURCE_OFF       = 0U,  /**< No clock is choosen as system clock output */
    MCU_CLOCK_OUT_SOURCE_FIRC      = 1U,  /**< Choose FIRC as system clock output */
    MCU_CLOCK_OUT_SOURCE_SIRC      = 2U,  /**< Choose SIRC as system clock output */
    MCU_CLOCK_OUT_SOURCE_FXOSC     = 3U,  /**< Choose FXOSC as system clock output */
#if (MCU_HAS_SXOSC == STD_ON)
    MCU_CLOCK_OUT_SOURCE_SXOSC     = 4U,  /**< Choose SXOSC as system clock output */
#endif
    MCU_CLOCK_OUT_SOURCE_PLL       = 5U,  /**< Choose PLL as system clock output */
} Mcu_ClockOutSourceType;
#elif defined(CPU_YTM32B1HA0)
typedef enum
{
    MCU_CLOCK_OUT_SOURCE_OFF       = 0U,  /**< No clock is choosen as system clock output */
    MCU_CLOCK_OUT_SOURCE_FIRC      = 1U,  /**< Choose FIRC as system clock output */
    MCU_CLOCK_OUT_SOURCE_SIRC      = 2U,  /**< Choose SIRC as system clock output */
    MCU_CLOCK_OUT_SOURCE_FXOSC     = 3U,  /**< Choose FXOSC as system clock output */
    MCU_CLOCK_OUT_SOURCE_SXOSC     = 4U,  /**< Choose SXOSC as system clock output */
    MCU_CLOCK_OUT_SOURCE_PLL       = 5U,  /**< Choose PLL as system clock output */
    MCU_CLOCK_OUT_SOURCE_TRNG      = 6U,  /**< Choose TRNG ring oscillator as system clock output */
    MCU_CLOCK_OUT_SOURCE_CORE      = 7U,  /**< Choose Core clock as system clock output */
} Mcu_ClockOutSourceType;
#elif defined(CPU_YTM32B1MC0) || defined(CPU_YTM32B1MD2)
typedef enum
{
    MCU_CLOCK_OUT_SOURCE_OFF       = 0U,  /**< No clock is choosen as system clock output */
    MCU_CLOCK_OUT_SOURCE_FIRC      = 1U,  /**< Choose FIRC as system clock output */
    MCU_CLOCK_OUT_SOURCE_SIRC      = 2U,  /**< Choose SIRC as system clock output */
    MCU_CLOCK_OUT_SOURCE_FXOSC     = 3U,  /**< Choose FXOSC as system clock output */
#if (MCU_NO_PLL == STD_OFF)
    MCU_CLOCK_OUT_SOURCE_PLL       = 4U,  /**< Choose PLL as system clock output */
#endif
    MCU_CLOCK_OUT_SOURCE_LPO       = 5U,  /**< Choose LPO clock as system clock output */
    MCU_CLOCK_OUT_SOURCE_TRNG      = 6U,  /**< Choose TRNG ring oscillator as system clock output */
    MCU_CLOCK_OUT_SOURCE_CORE      = 7U,  /**< Choose Core clock as system clock output */
} Mcu_ClockOutSourceType;
#elif defined(CPU_YTM32B1ME1)
typedef enum
{
    MCU_CLOCK_OUT_SOURCE_OFF       = 0U,    /**< No clock is choosen as system clock output */
    MCU_CLOCK_OUT_SOURCE_FIRC      = 1U,    /**< Choose FIRC as system clock output */
    MCU_CLOCK_OUT_SOURCE_SIRC      = 2U,    /**< Choose SIRC as system clock output */
    MCU_CLOCK_OUT_SOURCE_FXOSC     = 3U,    /**< Choose FXOSC as system clock output */
    MCU_CLOCK_OUT_SOURCE_SXOSC     = 4U,    /**< Choose SXOSC as system clock output */
    MCU_CLOCK_OUT_SOURCE_PLL       = 5U,    /**< Choose PLL as system clock output */
    MCU_CLOCK_OUT_SOURCE_TRNG      = 6U,    /**< Choose TRNG as system clock output */
    MCU_CLOCK_OUT_SOURCE_CORE      = 7U,    /**< Choose CORE as system clock output */
    MCU_CLOCK_OUT_SOURCE_LPO       = 8U,    /**< Choose LPO as system clock output */
} Mcu_ClockOutSourceType;
#endif

/**
 * @brief          This enumeration type is used to enumerate the clock monitor unit(CMU) reference
 *                 clock.
 * @autosar        N/A
 */
typedef enum
{
    MCU_CMU_CLOCK_REFERENCE_SIRC   = 0U,  /**< Choose SIRC as reference clock */
    MCU_CMU_CLOCK_REFERENCE_FXOSC  = 1U,  /**< Choose FXOSC as reference clock */
} Mcu_CmuClockReferenceType;

/**
 * @brief          This enumeration type is used to enumerate the PLL reference clock.
 * @autosar        N/A
 */
typedef enum
{
    MCU_PLL_CLOCK_REFERENCE_FXOSC  = 0U,  /**< Choose FXOSC as PLL reference clock */
    MCU_PLL_CLOCK_REFERENCE_FIRC   = 1U,  /**< Choose FIRC as PLL reference clock */
} Mcu_PllClockRefType;

/**
 * @brief          This enumeration type is used to enumerate the IPC clock source.
 * @autosar        N/A
 */
#if defined(CPU_YTM32B1HA0)
typedef enum
{
    MCU_IPC_CLK_SRC_OFF            = 0U,  /**< IPC clock is off */
    MCU_IPC_CLK_SRC_FIRC           = 1U,  /**< Choose FIRC as IPC clock */
    MCU_IPC_CLK_SRC_SIRC_DIV4      = 2U,  /**< Choose SIRC_DIV4 as IPC clock */
    MCU_IPC_CLK_SRC_FXOSC          = 3U,  /**< Choose FXOSC as IPC clock */
    MCU_IPC_CLK_SRC_SXOSC          = 4U,  /**< Choose SXOSC as IPC clock */
    MCU_IPC_CLK_SRC_PLL            = 5U,  /**< Choose PLL as IPC clock */

    MCU_IPC_CLK_SRC_FAST_BUS       = 7U,  /**< Choose Fast bus as IPC clock */
} Mcu_PeripheralClockSourceType;
#elif defined(CPU_YTM32B1ME0) || defined(CPU_YTM32B1MD1)
typedef enum
{
    MCU_IPC_CLK_SRC_OFF            = 0U,  /**< IPC clock is off */
    MCU_IPC_CLK_SRC_FIRC           = 1U,  /**< Choose FIRC as IPC clock */
    MCU_IPC_CLK_SRC_SIRC           = 2U,  /**< Choose SIRC as IPC clock */
    MCU_IPC_CLK_SRC_FXOSC          = 3U,      /**< Choose FXOSC as IPC clock */
#if (MCU_HAS_SXOSC == STD_ON)
    MCU_IPC_CLK_SRC_SXOSC          = 4U,  /**< Choose SXOSC as IPC clock */
#endif
    MCU_IPC_CLK_SRC_PLL            = 5U,  /**< Choose PLL as IPC clock */
} Mcu_PeripheralClockSourceType;
#elif defined(CPU_YTM32B1MC0) || defined(CPU_YTM32B1MD2)
typedef enum
{
    MCU_IPC_CLK_SRC_OFF            = 0U,  /**< IPC clock is off */
    MCU_IPC_CLK_SRC_FIRC           = 1U,  /**< Choose FIRC as IPC clock */
    MCU_IPC_CLK_SRC_SIRC           = 2U,  /**< Choose SIRC as IPC clock */
    MCU_IPC_CLK_SRC_FXOSC          = 3U,  /**< Choose FXOSC as IPC clock */
    MCU_IPC_CLK_SRC_LPO            = 4U,  /**< Choose LPO clock as IPC clock */
#if (MCU_NO_PLL == STD_OFF)
    MCU_IPC_CLK_SRC_PLL            = 5U,  /**< Choose PLL clock as IPC clock */
#endif
    MCU_IPC_CLK_SRC_FAST_BUS       = 7U,  /**< Choose Fast bus as IPC clock */
} Mcu_PeripheralClockSourceType;
#elif defined(CPU_YTM32B1ME1)
typedef enum
{
    MCU_IPC_CLK_SRC_OFF       = 0x00U,  /**< IPC clock is off */
    MCU_IPC_CLK_SRC_FIRC      = 0x01U,  /**< Choose FIRC as IPC clock */
    MCU_IPC_CLK_SRC_SIRC      = 0x02U,  /**< Choose SIRC as IPC clock */
    MCU_IPC_CLK_SRC_FXOSC     = 0x03U,  /**< Choose FXOSC as IPC clock */
    MCU_IPC_CLK_SRC_SXOSC     = 0x04U,  /**< Choose SXOSC as IPC clock */
    MCU_IPC_CLK_SRC_PLL       = 0x05U,  /**< Choose PLL clock as IPC clock */
    MCU_IPC_CLK_SRC_LPO       = 0x06U,  /**< Choose LPO clock as IPC clock */
    MCU_IPC_CLK_SRC_FAST_BUS  = 0x07U,  /**< Choose Fast bus as IPC clock */
} Mcu_PeripheralClockSourceType;
#endif

/**
 * @brief          This enumeration type is used to enumerate the Mcu error types.
 * @autosar        N/A
 */
typedef enum
{
    MCU_E_CLOCK_FAILURE            = 0U,  /**< Error in clock setting */
    MCU_E_CMU_FAILURE              = 1U,  /**< Error in monitored clock frequency is checked */
} Mcu_ErrorType;

#if defined(CPU_YTM32B1MC0) || defined(CPU_YTM32B1MD2)
/**
 * @brief          This enumeration type is used to enumerate the Mcu Pcu Lvd Trim types.
 * @autosar        N/A
 */
typedef enum
{
    MCU_PCU_LVD5V_TRIM_1850MV      = 0U,  /**< LVD5V threshold voltage is 1.850V */
    MCU_PCU_LVD5V_TRIM_2090MV      = 1U,  /**< LVD5V threshold voltage is 2.090V */
    MCU_PCU_LVD5V_TRIM_2330MV      = 2U,  /**< LVD5V threshold voltage is 2.330V */
    MCU_PCU_LVD5V_TRIM_2570MV      = 3U,  /**< LVD5V threshold voltage is 2.570V */
    MCU_PCU_LVD5V_TRIM_2810MV      = 4U,  /**< LVD5V threshold voltage is 2.810V */
    MCU_PCU_LVD5V_TRIM_3050MV      = 5U,  /**< LVD5V threshold voltage is 3.050V */
    MCU_PCU_LVD5V_TRIM_3290MV      = 6U,  /**< LVD5V threshold voltage is 3.290V */
    MCU_PCU_LVD5V_TRIM_3530MV      = 7U,  /**< LVD5V threshold voltage is 3.530V */
    MCU_PCU_LVD5V_TRIM_3770MV      = 8U,  /**< LVD5V threshold voltage is 3.770V */
    MCU_PCU_LVD5V_TRIM_4010MV      = 9U,  /**< LVD5V threshold voltage is 4.010V */
    MCU_PCU_LVD5V_TRIM_4250MV      = 10U, /**< LVD5V threshold voltage is 4.250V */
    MCU_PCU_LVD5V_TRIM_4490MV      = 11U, /**< LVD5V threshold voltage is 4.490V */
    MCU_PCU_LVD5V_TRIM_4730MV      = 12U, /**< LVD5V threshold voltage is 4.730V */
    MCU_PCU_LVD5V_TRIM_4970MV      = 13U, /**< LVD5V threshold voltage is 4.970V */
} Mcu_PcuLvdTrimType;

/**
 * @brief          This enumeration type is used to enumerate the Mcu Pcu Lvd Hysteresis types.
 * @autosar        N/A
 */
typedef enum
{
    MCU_PCU_LVD5V_HYS_PERCENT_0P0  = 0U,  /**< LVD5V hysteresis is 0% */
    MCU_PCU_LVD5V_HYS_PERCENT_2P0  = 1U,  /**< LVD5V hysteresis is 2% */
    MCU_PCU_LVD5V_HYS_PERCENT_4P2  = 2U,  /**< LVD5V hysteresis is 4.2% */
    MCU_PCU_LVD5V_HYS_PERCENT_8P4  = 3U,  /**< LVD5V hysteresis is 8.4% */
} Mcu_PcuLvdHysteresisType;

#endif

/**
 * @brief          This enumeration type is used to enumerate the Mcu power mode.
 * @autosar        N/A
 */
typedef enum
{
    MCU_POWER_MODE_RUN             = 0U,  /**< Mcu power mode Run */
    MCU_POWER_MODE_STANDBY         = 1U,  /**< Mcu power mode Standby */
    MCU_POWER_MODE_SLEEP           = 2U,  /**< Mcu power mode Sleep */
    MCU_POWER_MODE_DEEPSLEEP       = 3U,  /**< Mcu power mode Deep Sleep */
#if (MCU_POWERDOWN_MODE_SUPPORT == STD_ON)
    MCU_POWER_MODE_POWERDOWN       = 4U,  /**< Mcu power mode Power Down */
#endif
#if (MCU_DEEP_POWERDOWN_MODE_SUPPORT == STD_ON)
    MCU_POWER_MODE_DEPP_POWERDOWN  = 5U,  /**< Mcu power mode Power Down */
#endif
} Mcu_PowerModeType;

#if (MCU_FXOSC_DELAY_SUPPORT == STD_ON)
/**
 * @brief          This enumeration type is used to enumerate the FXOSC clock output delay select.
 * @autosar        N/A
 */
typedef enum
{
    MCU_FXOSC_DELAY_4096_CYCLES    = 0U,  /**< Delay 4096 cycles */
    MCU_FXOSC_DELAY_8192_CYCLES    = 1U,  /**< Delay 8192 cycles */
    MCU_FXOSC_DELAY_16384_CYCLES   = 2U,  /**< Delay 16384 cycles */
    MCU_FXOSC_DELAY_32768_CYCLES   = 3U,  /**< Delay 32768 cycles */
} Mcu_FxoscDelayTypes;
#endif

#if defined(CPU_YTM32B1ME0)
/**
 * @brief          Peripheral Clock Index for YTM32B1ME0.
 * @autosar        N/A
 */
typedef enum
{
    MCU_IPC_DMA_INDEX              = 8U,
    MCU_IPC_TRACE_INDEX            = 15U,
    MCU_IPC_EFM_INDEX              = 16U,
    MCU_IPC_GPIO_INDEX             = 17U,
    MCU_IPC_PCTRLA_INDEX           = 18U,
    MCU_IPC_PCTRLB_INDEX           = 19U,
    MCU_IPC_PCTRLC_INDEX           = 20U,
    MCU_IPC_PCTRLD_INDEX           = 21U,
    MCU_IPC_PCTRLE_INDEX           = 22U,
    MCU_IPC_LINFLEXD0_INDEX        = 27U,
    MCU_IPC_LINFLEXD1_INDEX        = 28U,
    MCU_IPC_LINFLEXD2_INDEX        = 29U,
    MCU_IPC_LINFLEXD3_INDEX        = 30U,
    MCU_IPC_LINFLEXD4_INDEX        = 31U,
    MCU_IPC_LINFLEXD5_INDEX        = 32U,
    MCU_IPC_I2C0_INDEX             = 35U,
    MCU_IPC_I2C1_INDEX             = 36U,
    MCU_IPC_I2C2_INDEX             = 37U,
    MCU_IPC_SPI0_INDEX             = 42U,
    MCU_IPC_SPI1_INDEX             = 43U,
    MCU_IPC_SPI2_INDEX             = 44U,
    MCU_IPC_SPI3_INDEX             = 45U,
    MCU_IPC_SPI4_INDEX             = 46U,
    MCU_IPC_SPI5_INDEX             = 47U,
    MCU_IPC_FLEXCAN0_INDEX         = 48U,
    MCU_IPC_FLEXCAN1_INDEX         = 52U,
    MCU_IPC_FLEXCAN2_INDEX         = 56U,
    MCU_IPC_FLEXCAN3_INDEX         = 60U,
    MCU_IPC_FLEXCAN4_INDEX         = 61U,
    MCU_IPC_FLEXCAN5_INDEX         = 62U,
    MCU_IPC_ADC0_INDEX             = 64U,
    MCU_IPC_ADC1_INDEX             = 65U,
    MCU_IPC_ACMP0_INDEX            = 67U,
    MCU_IPC_PTU0_INDEX             = 70U,
    MCU_IPC_PTU1_INDEX             = 71U,
    MCU_IPC_TMU_INDEX              = 72U,
    MCU_IPC_ETMR0_INDEX            = 73U,
    MCU_IPC_ETMR1_INDEX            = 74U,
    MCU_IPC_ETMR2_INDEX            = 75U,
    MCU_IPC_ETMR3_INDEX            = 76U,
    MCU_IPC_ETMR4_INDEX            = 77U,
    MCU_IPC_ETMR5_INDEX            = 78U,
    MCU_IPC_TMR0_INDEX             = 84U,
    MCU_IPC_PTMR0_INDEX            = 90U,
    MCU_IPC_LPTMR0_INDEX           = 93U,
    MCU_IPC_RTC_INDEX              = 96U,
    MCU_IPC_WKU_INDEX              = 98U,
    MCU_IPC_CRC_INDEX              = 101U,
    MCU_IPC_TRNG_INDEX             = 102U,
    MCU_IPC_HCU_INDEX              = 103U,
    MCU_IPC_WDG_INDEX              = 106U,
    MCU_IPC_EWDG_INDEX             = 107U,
    MCU_IPC_INTM_INDEX             = 113U,
    MCU_IPC_EMU_INDEX              = 114U,
    MCU_IPC_STU_INDEX              = 119U,
    MCU_IPC_CIM_INDEX              = 123U,
    MCU_IPC_SCU_INDEX              = 124U,
    MCU_IPC_PCU_INDEX              = 126U,
    MCU_IPC_RCU_INDEX              = 127U,
    MCU_IPC_INVALID_INDEX          = 128U,
} Mcu_PeripheralIndexType;

#endif
#if defined(CPU_YTM32B1MD1)
/**
 * @brief          Peripheral Clock Index for YTM32B1MD1.
 * @autosar        N/A
 */
typedef enum
{
    MCU_IPC_DMA_INDEX              = 8U,
    MCU_IPC_TRACE_INDEX            = 15U,
    MCU_IPC_EFM_INDEX              = 16U,
    MCU_IPC_GPIO_INDEX             = 17U,
    MCU_IPC_PCTRLA_INDEX           = 18U,
    MCU_IPC_PCTRLB_INDEX           = 19U,
    MCU_IPC_PCTRLC_INDEX           = 20U,
    MCU_IPC_PCTRLD_INDEX           = 21U,
    MCU_IPC_PCTRLE_INDEX           = 22U,
    MCU_IPC_LINFLEXD0_INDEX        = 27U,
    MCU_IPC_LINFLEXD1_INDEX        = 28U,
    MCU_IPC_LINFLEXD2_INDEX        = 29U,
    MCU_IPC_SENT0_INDEX            = 33U,
    MCU_IPC_I2C0_INDEX             = 35U,
    MCU_IPC_I2C1_INDEX             = 36U,
    MCU_IPC_SPI0_INDEX             = 42U,
    MCU_IPC_SPI1_INDEX             = 43U,
    MCU_IPC_SPI2_INDEX             = 44U,
    MCU_IPC_SPI3_INDEX             = 45U,
    MCU_IPC_FLEXCAN0_INDEX         = 48U,
    MCU_IPC_FLEXCAN1_INDEX         = 52U,
    MCU_IPC_FLEXCAN2_INDEX         = 56U,
    MCU_IPC_ADC0_INDEX             = 64U,
    MCU_IPC_ACMP0_INDEX            = 67U,
    MCU_IPC_PTU0_INDEX             = 70U,
    MCU_IPC_TMU_INDEX              = 72U,
    MCU_IPC_ETMR0_INDEX            = 73U,
    MCU_IPC_ETMR1_INDEX            = 74U,
    MCU_IPC_ETMR2_INDEX            = 75U,
    MCU_IPC_ETMR3_INDEX            = 76U,
    MCU_IPC_TMR0_INDEX             = 84U,
    MCU_IPC_PTMR0_INDEX            = 90U,
    MCU_IPC_LPTMR0_INDEX           = 93U,
    MCU_IPC_RTC_INDEX              = 96U,
    MCU_IPC_WKU_INDEX              = 98U,
    MCU_IPC_CRC_INDEX              = 101U,
    MCU_IPC_TRNG_INDEX             = 102U,
    MCU_IPC_HCU_INDEX              = 103U,
    MCU_IPC_WDG_INDEX              = 106U,
    MCU_IPC_EWDG_INDEX             = 107U,
    MCU_IPC_EMU_INDEX              = 114U,
    MCU_IPC_CIM_INDEX              = 123U,
    MCU_IPC_SCU_INDEX              = 124U,
    MCU_IPC_PCU_INDEX              = 126U,
    MCU_IPC_RCU_INDEX              = 127U,
    MCU_IPC_INVALID_INDEX          = 128U,
} Mcu_PeripheralIndexType;
#endif

#if defined(CPU_YTM32B1HA0)
/**
 * @brief          Peripheral Clock Index for YTM32B1HA0.
 * @autosar        N/A
 */
typedef enum
{
    MCU_IPC_DMA_INDEX              = 8U,
    MCU_IPC_TRACE_INDEX            = 15U,
    MCU_IPC_GPIO_INDEX             = 17U,
    MCU_IPC_PCTRLA_INDEX           = 18U,
    MCU_IPC_PCTRLB_INDEX           = 19U,
    MCU_IPC_PCTRLC_INDEX           = 20U,
    MCU_IPC_PCTRLD_INDEX           = 21U,
    MCU_IPC_PCTRLE_INDEX           = 22U,
    MCU_IPC_LINFlexD0_INDEX        = 27U,
    MCU_IPC_LINFlexD1_INDEX        = 28U,
    MCU_IPC_LINFlexD2_INDEX        = 29U,
    MCU_IPC_LINFlexD3_INDEX        = 30U,
    MCU_IPC_LINFlexD4_INDEX        = 31U,
    MCU_IPC_LINFlexD5_INDEX        = 32U,
    MCU_IPC_LINFlexD6_INDEX        = 33U,
    MCU_IPC_LINFlexD7_INDEX        = 34U,
    MCU_IPC_LINFlexD8_INDEX        = 35U,
    MCU_IPC_LINFlexD9_INDEX        = 36U,
    MCU_IPC_I2C0_INDEX             = 37U,
    MCU_IPC_I2C1_INDEX             = 38U,
    MCU_IPC_I2C2_INDEX             = 39U,
    MCU_IPC_I2C3_INDEX             = 40U,
    MCU_IPC_I2C4_INDEX             = 41U,
    MCU_IPC_SPI0_INDEX             = 42U,
    MCU_IPC_SPI1_INDEX             = 43U,
    MCU_IPC_SPI2_INDEX             = 44U,
    MCU_IPC_SPI3_INDEX             = 45U,
    MCU_IPC_SPI4_INDEX             = 46U,
    MCU_IPC_SPI5_INDEX             = 47U,
    MCU_IPC_SPI6_INDEX             = 48U,
    MCU_IPC_SPI7_INDEX             = 49U,
    MCU_IPC_FlexCAN0_INDEX         = 52U,
    MCU_IPC_FlexCAN1_INDEX         = 53U,
    MCU_IPC_FlexCAN2_INDEX         = 54U,
    MCU_IPC_FlexCAN3_INDEX         = 55U,
    MCU_IPC_FlexCAN4_INDEX         = 56U,
    MCU_IPC_FlexCAN5_INDEX         = 57U,
    MCU_IPC_FlexCAN6_INDEX         = 58U,
    MCU_IPC_FlexCAN7_INDEX         = 59U,
    MCU_IPC_ADC0_INDEX             = 64U,
    MCU_IPC_ADC1_INDEX             = 65U,
    MCU_IPC_ACMP0_INDEX            = 67U,
    MCU_IPC_ACMP1_INDEX            = 68U,
    MCU_IPC_PTU0_INDEX             = 70U,
    MCU_IPC_PTU1_INDEX             = 71U,
    MCU_IPC_TMU_INDEX              = 72U,
    MCU_IPC_eTMR0_INDEX            = 73U,
    MCU_IPC_eTMR1_INDEX            = 74U,
    MCU_IPC_eTMR2_INDEX            = 75U,
    MCU_IPC_eTMR3_INDEX            = 76U,
    MCU_IPC_eTMR4_INDEX            = 77U,
    MCU_IPC_eTMR5_INDEX            = 78U,
    MCU_IPC_MPWM0_INDEX            = 81U,
    MCU_IPC_MPWM1_INDEX            = 82U,
    MCU_IPC_MPWM2_INDEX            = 83U,
    MCU_IPC_TMR0_INDEX             = 84U,
    MCU_IPC_TMR1_INDEX             = 85U,
    MCU_IPC_SENT0_INDEX            = 88U,
    MCU_IPC_SENT1_INDEX            = 89U,
    MCU_IPC_pTMR0_INDEX            = 90U,
    MCU_IPC_pTMR1_INDEX            = 91U,
    MCU_IPC_pTMR2_INDEX            = 92U,
    MCU_IPC_lpTMR0_INDEX           = 93U,
    MCU_IPC_RTC_INDEX              = 96U,
    MCU_IPC_WKU_INDEX              = 98U,
    MCU_IPC_PCRC_INDEX             = 101U,
    MCU_IPC_TRNG_INDEX             = 102U,
    MCU_IPC_HCU_INDEX              = 103U,
    MCU_IPC_QSPI_INDEX             = 104U,
    MCU_IPC_WDG_INDEX              = 106U,
    MCU_IPC_FMU_INDEX              = 112U,
    MCU_IPC_INTM_INDEX             = 113U,
    MCU_IPC_EMU_INDEX              = 114U,
    MCU_IPC_SAI0_INDEX             = 115U,
    MCU_IPC_SAI1_INDEX             = 116U,
    MCU_IPC_ENET_INDEX             = 121U,
    MCU_IPC_CIM_INDEX              = 123U,
    MCU_IPC_SCU_INDEX              = 124U,
    MCU_IPC_PCU_INDEX              = 126U,
    MCU_IPC_RCU_INDEX              = 127U,
} Mcu_PeripheralIndexType;
#endif

#if defined(CPU_YTM32B1MC0)
/**
 * @brief          Peripheral Clock Index for YTM32B1MC0.
 * @autosar        N/A
 */
typedef enum
{
    MCU_IPC_DMA_INDEX              = 8U,
    MCU_IPC_GPIO_INDEX             = 17U,
    MCU_IPC_PCTRLA_INDEX           = 18U,
    MCU_IPC_PCTRLB_INDEX           = 19U,
    MCU_IPC_PCTRLC_INDEX           = 20U,
    MCU_IPC_PCTRLD_INDEX           = 21U,
    MCU_IPC_PCTRLE_INDEX           = 22U,
    MCU_IPC_UART0_INDEX            = 27U,
    MCU_IPC_UART1_INDEX            = 28U,
    MCU_IPC_UART2_INDEX            = 29U,
    MCU_IPC_I2C0_INDEX             = 35U,
    MCU_IPC_I2C1_INDEX             = 36U,
    MCU_IPC_SPI0_INDEX             = 42U,
    MCU_IPC_SPI1_INDEX             = 43U,
    MCU_IPC_SPI2_INDEX             = 44U,
    MCU_IPC_FlexCAN0_INDEX         = 48U,
    MCU_IPC_FlexCAN1_INDEX         = 52U,
    MCU_IPC_ADC0_INDEX             = 64U,
    MCU_IPC_ACMP0_INDEX            = 67U,
    MCU_IPC_TMU_INDEX              = 72U,
    MCU_IPC_eTMR0_INDEX            = 73U,
    MCU_IPC_eTMR1_INDEX            = 74U,
    MCU_IPC_MPWM0_INDEX            = 79U,
    MCU_IPC_pTMR0_INDEX            = 90U,
    MCU_IPC_lpTMR0_INDEX           = 93U,
    MCU_IPC_CRC_INDEX              = 101U,
    MCU_IPC_TRNG_INDEX             = 102U,
    MCU_IPC_HCU_INDEX              = 103U,
    MCU_IPC_WDG0_INDEX             = 106U,
    MCU_IPC_EWDG_INDEX             = 107U,
    MCU_IPC_EMU_INDEX              = 114U,
    MCU_IPC_CIM_INDEX              = 123U,
    MCU_IPC_SCU_INDEX              = 124U,
} Mcu_PeripheralIndexType;
#endif
#if defined(CPU_YTM32B1MD2)
/**
 * @brief          Peripheral Clock Index for YTM32B1MD2.
 * @autosar        N/A
 */
typedef enum
{
    MCU_IPC_DMA_INDEX              = 8U,
    MCU_IPC_GPIO_INDEX             = 17U,
    MCU_IPC_PCTRLA_INDEX           = 18U,
    MCU_IPC_PCTRLB_INDEX           = 19U,
    MCU_IPC_PCTRLC_INDEX           = 20U,
    MCU_IPC_PCTRLD_INDEX           = 21U,
    MCU_IPC_PCTRLE_INDEX           = 22U,
    MCU_IPC_UART0_INDEX            = 27U,
    MCU_IPC_UART1_INDEX            = 28U,
    MCU_IPC_UART2_INDEX            = 29U,
    MCU_IPC_I2C0_INDEX             = 35U,
    MCU_IPC_I2C1_INDEX             = 36U,
    MCU_IPC_SPI0_INDEX             = 42U,
    MCU_IPC_SPI1_INDEX             = 43U,
    MCU_IPC_SPI2_INDEX             = 44U,
    MCU_IPC_FlexCAN0_INDEX         = 48U,
    MCU_IPC_FlexCAN1_INDEX         = 52U,
    MCU_IPC_FlexCAN2_INDEX         = 56U,
    MCU_IPC_eADC0_INDEX            = 64U,
    MCU_IPC_ACMP0_INDEX            = 67U,
    MCU_IPC_TMU_INDEX              = 72U,
    MCU_IPC_eTMR0_INDEX            = 73U,
    MCU_IPC_eTMR1_INDEX            = 74U,
    MCU_IPC_MPWM0_INDEX            = 79U,
    MCU_IPC_pTMR0_INDEX            = 90U,
    MCU_IPC_lpTMR0_INDEX           = 93U,
    MCU_IPC_RTC_INDEX              = 96U,
    MCU_IPC_CRC_INDEX              = 101U,
    MCU_IPC_TRNG_INDEX             = 102U,
    MCU_IPC_HCU_INDEX              = 103U,
    MCU_IPC_WDG_INDEX              = 106U,
    MCU_IPC_EWDG_INDEX             = 107U,
    MCU_IPC_EMU_INDEX              = 114U,
    MCU_IPC_CMU_INDEX              = 118U,
    MCU_IPC_CFMU_INDEX             = 119U,
    MCU_IPC_CIM_INDEX              = 123U,
    MCU_IPC_SCU_INDEX              = 124U,
} Mcu_PeripheralIndexType;
#elif defined (CPU_YTM32B1ME1)
/*! @brief Peripheral Clock Index. */
typedef enum
{
    MCU_IPC_DMA_INDEX      = 8U,
    MCU_IPC_TRACE_INDEX  = 15U,
    MCU_IPC_GPIO_INDEX     = 17U,
    MCU_IPC_PCTRLA_INDEX   = 18U,
    MCU_IPC_PCTRLB_INDEX   = 19U,
    MCU_IPC_PCTRLC_INDEX   = 20U,
    MCU_IPC_PCTRLD_INDEX   = 21U,
    MCU_IPC_PCTRLE_INDEX   = 22U,
    MCU_IPC_UART0_INDEX    = 27U,
    MCU_IPC_UART1_INDEX    = 28U,
    MCU_IPC_UART2_INDEX    = 29U,
    MCU_IPC_UART3_INDEX    = 30U,
    MCU_IPC_UART4_INDEX    = 31U,
    MCU_IPC_UART5_INDEX    = 32U,
    MCU_IPC_I2C0_INDEX     = 37U,
    MCU_IPC_I2C1_INDEX     = 38U,
    MCU_IPC_I2C2_INDEX     = 39U,
    MCU_IPC_SPI0_INDEX     = 42U,
    MCU_IPC_SPI1_INDEX     = 43U,
    MCU_IPC_SPI2_INDEX     = 44U,
    MCU_IPC_SPI3_INDEX     = 45U,
    MCU_IPC_SPI4_INDEX     = 46U,
    MCU_IPC_SPI5_INDEX     = 47U,
    MCU_IPC_FlexCAN0_INDEX = 52U,
    MCU_IPC_FlexCAN1_INDEX = 53U,
    MCU_IPC_FlexCAN2_INDEX = 54U,
    MCU_IPC_FlexCAN3_INDEX = 55U,
    MCU_IPC_ADC0_INDEX     = 64U,
    MCU_IPC_ADC1_INDEX     = 65U,
    MCU_IPC_ACMP_INDEX     = 67U,
    MCU_IPC_TMU_INDEX      = 72U,
    MCU_IPC_eTMR0_INDEX    = 73U,
    MCU_IPC_eTMR1_INDEX    = 74U,
    MCU_IPC_eTMR2_INDEX    = 75U,
    MCU_IPC_eTMR3_INDEX    = 76U,
    MCU_IPC_MPWM_INDEX     = 81U,
    MCU_IPC_TMR_INDEX      = 84U,
    MCU_IPC_SENT_INDEX     = 88U,
    MCU_IPC_pTMR_INDEX     = 90U,
    MCU_IPC_lpTMR_INDEX    = 93U,
    MCU_IPC_RTC_INDEX      = 96U,
    MCU_IPC_WKU_INDEX      = 98U,
    MCU_IPC_CRC_INDEX      = 101U,
    MCU_IPC_TRNG_INDEX     = 102U,
    MCU_IPC_HCU_INDEX      = 103U,
    MCU_IPC_WDG_INDEX      = 106U,
    MCU_IPC_EWDG_INDEX     = 107U,
    MCU_IPC_INTM_INDEX     = 113U,
    MCU_IPC_EMU_INDEX      = 114U,
    MCU_IPC_CIM_INDEX      = 123U,
    MCU_IPC_SCU_INDEX      = 124U,
    MCU_IPC_PCU_INDEX      = 126U,
    MCU_IPC_RCU_INDEX      = 127U,
} Mcu_PeripheralIndexType;
#endif


/*==================================================================================================
 *                                             typedef
==================================================================================================*/
/**
 * @brief          Definition of Mcu Clock Type This typedef defines the MCU clock type as an 8-bit
 *                 unsigned integer (uint8).
 * @autosar        SWS_Mcu_00251
 */
typedef uint8 Mcu_ClockType;

/**
 * @brief          MCU raw reset type definition
 * @autosar        N/A
 */
typedef uint32 Mcu_RawResetType;

/**
 * @brief          This type specifies the identification (ID) for a RAM section, which is
 *                 configured in the configuration structure
 * @autosar        N/A
 */
typedef uint8 Mcu_RamSectionType;

/**
 * @brief          Mcu module notification function type definition
 * @autosar        N/A
 */
typedef void (*Mcu_NotificationType)(void);

/**
 * @brief          Type representing CMU error status flags.
 * @details        This type encodes the CMU status register value after  applying the channel-specific
 *                 bit shifts. Each flag corresponds to a specific error condition and can be
 *                 identified using the following masks:
 *                 - LOSV   : MCU_CMU_FLAG_LOSV_MASK
 *                 - OUTRNG : MCU_CMU_FLAG_OUTRNG_MASK
 *                 - LOSC   : MCU_CMU_FLAG_LOSC_MASK
 *                 - LOSR   : MCU_CMU_FLAG_LOSR_MASK
 *
 *                 The user can determine which error(s) occurred by checking
 *                 which bit(s) are set in this value.
 *
 * @implements     Mcu_CmuErrorType_typedef
 * @autosar        N/A
 */
typedef uint32 Mcu_CmuErrorType;

/**
 * @brief          Mcu module Cmu notification function type definition
 * @autosar        N/A
 */
typedef void (*Mcu_CmuNotificationType)(Mcu_CmuErrorType CmuError);

/*==================================================================================================
 *                                              STRUCT
==================================================================================================*/
/**
 * @brief          Type definition of struct that contains the configuration of an MCU RAM block or section.
 * @autosar        N/A
 */
typedef struct
{
    uint8 DefaultValue;                   /**< Default value of the RAM block or section. */
    uint8 SectionWriteSize;               /**< Write size of the RAM block of each write. */ 
    uint32 BaseAddress;                   /**< Base address of the RAM block or section. */
    uint32 SectionSize;                   /**< Size of the RAM block or section in bytes. */
} Mcu_RamSectionConfigType;

/**
 * @brief          Configuration structure for the Mcu Clock Monitor.
 * @autosar        N/A
 */
typedef struct
{
    boolean Enable;                       /**< If set to true, enables the Clock Monitor. */
    Mcu_CmuClockReferenceType ClockReference; /**< Selects the clock reference to be used by the CMU. */
    boolean ResetEnable;                  /**< Configures whether to reset the chip once CMU error detected */
    boolean CmuIntEnable;                 /**< Configures the interrupt enable of CMU */
    uint8 CmuChannelIdx;                  /**< Configures the current CMU channel Id */
#if defined (CPU_YTM32B1MD2)
    uint8 CmuVldDlyValue;                 /**< Configures the reference clock valid delay value of CMU register */
#endif
    uint16 CmuCmpLValue;                  /**< Configures the low value of CMU compare register */
    uint16 CmuCmpHValue;                  /**< Configures the high value of CMU compare register */
    Mcu_CmuNotificationType NotificationPtr; /**< Configures the notification of CMU */
} Mcu_ClockMonitorConfigType;

/**
 * @brief          SCU FXOSC configuration.
 * @autosar        N/A
 */
typedef struct
{
    uint32 ClockRefPointFrequency;        /**< Clock reference point frequency */
    boolean BypassMode;                   /**< FXOSC bypass mode*/
    uint8 GainSelection;                  /**< FXOSC gain selection */
    boolean DeepSleepEnable;              /**< FXOSC deep sleep enable */
#if (MCU_FXOSC_DELAY_SUPPORT == STD_ON)
    Mcu_FxoscDelayTypes DelaySelect;      /**< FXOSC clock out delay enable */
#endif
} Mcu_FxoscConfigType;

#if (MCU_HAS_SXOSC == STD_ON)
/**
 * @brief          SCU SXOSC configuration.
 * @autosar        N/A
 */
typedef struct
{
    uint32 ClockRefPointFrequency;        /**< Clock reference point frequency */
    boolean BypassMode;                   /**< SXOSC bypass mode*/
    uint8 GainSelection;                  /**< SXOSC gain selection */
    boolean DeepSleepEnable;              /**< SXOSC deep sleep enable */
    boolean StandbyEnable;                /**< SXOSC standby enable */
    boolean PowerDownEnable;              /**< SXOSC power down enable */
} Mcu_SxoscConfigType;
#endif

/**
 * @brief          SCU SIRC configuration.
 * @autosar        N/A

 */
typedef struct
{
    uint32 SircClockRefPointFrequency;
    boolean SircDeepSleepEnable;          /**< SIRC DeepSleep mode enable */
    boolean SircStandbyEnable;            /**< SIRC Standby mode enable */
#if (MCU_POWERDOWN_MODE_SUPPORT == STD_ON)
    boolean SircPowerDownEnable;          /**< SIRC PowerDown mode enable */
#endif
} Mcu_SircConfigType;

/**
 * @brief          SCU FIRC configuration.
 * @autosar        N/A
 */
typedef struct
{
#if (MCU_FIRC_DELAY_SUPPORT == STD_ON)
    boolean FircDelayEnable;              /** FIRC clock out delay enable */
#endif
    uint32 FircClockRefPointFrequency;
    boolean FircDeepSleepEnable;          /** FIRC DeepSleep mode enable */
} Mcu_FircConfigType;

/**
 * @brief          ClockOut configuration.
 * @autosar        N/A
 */
typedef struct
{
    Mcu_ClockOutSourceType Source;        /**< Selects the clock source to be output on the CLKOUT pin */
    uint8 ClockOutDiv;                    /**< Selects the clock divider to be used by the CLKOUT pin */
} Mcu_ClockOutConfigType;

/**
 * @brief          PLL configuration.
 * @autosar        N/A
 */
typedef struct
{
    Mcu_PllClockRefType ClockRef;         /**< Selects the clock reference to be used by the PLL */
    uint8 RefDiv;                         /**< Selects the PLL reference clock divider */
    uint8 FeedbackDiv;                    /**< Selects the PLL feedback divider */
#if (MCU_PLL_ADVANCED_MODE_SUPPORT == STD_ON)
    boolean PLLDitherEnable;              /**< PLL Dither enable */
    uint8 PLLDitherGain;                  /**< Dither gain control bit. Replace one bit of the accumulator with the output of the LFSR */
    boolean PLLFMModeEnable;              /**< PLL spread spectrum mode enable, enable or disable spread spectrum mode */
    uint32 PLLFMStepSize;                 /**< Frequency Modulation Step Size */
    uint32 PLLFMStepNum;                  /**< Frequency Modulation Number of Steps */
    boolean PLLFracModeEnable;            /**< PLL fractional mode enable */
    uint16 PLLFracLoopDivFactor;          /**< Numerator of Fractional Loop Division Factor */
#endif
} Mcu_PllConfigType;

/**
 * @brief          IPC configuration.
 * @autosar        N/A
 */
typedef struct
{
    Mcu_PeripheralIndexType PeripheralIndex; /**< Peripheral index */
    boolean ClockEnable;                  /**< Clock enable */
    Mcu_PeripheralClockSourceType ClockSource; /**< Clock source */
    uint8 ClockDiv;                       /**< Clock divider */
} Mcu_IpcConfigType;

/**
 * @brief          Peripheral clock configuration.
 * @autosar        N/A
 */
typedef struct
{
    uint8 IpcCount;                       /**< IPC count */
    Mcu_IpcConfigType *IpcConfig;         /**< IPC configuration */
} Mcu_PeripheralClockConfigType;

/**
 * @brief            Mcu driver configuration structure.
 * @autosar        N/A
 */
typedef struct
{
    Mcu_SystemClockSourceType SystemClockSource; /**< System clock source */
    uint8 CoreClockDiv;                   /**< Core clock divider */
    uint8 FastBusClockDiv;                /**< Fast bus clock divider */
    uint8 SlowBusClockDiv;                /**< Slow bus clock divider */
    uint8 EfmPrescaleValue;               /**< EFM prescale value */
    uint8 EfmWRSValue;                    /**< EFM WRS value */
#if (MCU_EEPROM_SUPPORT == STD_ON)
    uint8 EEPROMPrescaleValue;            /**< EEPROM prescale value */
    uint8 EEPROMWRSValue;                 /**< EEPROM WRS value */
#endif
    boolean SircUnderUserCtrl;            /**< SIRC under user control */
    const Mcu_SircConfigType *SircConfig; /**< SIRC configuration */

    boolean FircUnderUserCtrl;            /**< FIRC under user control */
    boolean FircEnable;                   /**< FIRC enable */
    const Mcu_FircConfigType *FircConfig; /**< FIRC configuration */

    boolean FxoscUnderUserCtrl;           /**< FXOSC under user control */
    boolean FxoscEnable;                  /**< FXOSC enable */
    const Mcu_FxoscConfigType *FxoscConfig; /**< FXOSC configuration */

#if (MCU_HAS_SXOSC == STD_ON)
    boolean SxoscUnderUserCtrl;           /**< SXOSC under user control */
    boolean SxoscEnable;                  /**< SXOSC enable */
    const Mcu_SxoscConfigType *SxoscConfig; /**< SXOSC configuration */
#endif

    boolean PllUnderUserCtrl;             /**< PLL under user control */
    boolean PllEnable;                    /**< PLL enable */
    const Mcu_PllConfigType *PllConfig;   /**< PLL configuration */

    boolean ClockOutEnable;               /**< Clock out enable */
    const Mcu_ClockOutConfigType *ClockOutConfig; /**< Clock out configuration */

    const Mcu_ClockMonitorConfigType *ClockMonitorConfig; /**< Clock monitor configuration */
    const uint8 ClockMonitorConfigNums;   /**< Clock monitor configuration number */
    const Mcu_PeripheralClockConfigType *PeripheralClockConfig; /**< Peripheral clock configuration */
} Mcu_ClockConfigType;

/**
 * @brief          Struct representing configuration for MCU reset parameters.
 * @autosar        N/A
 */
typedef struct
{
    boolean HwResetPinOutputEnable;       /**< Enables/disables the hardware reset output pin. */
    boolean HwResetPinFilterEnable;       /**< Enables/disables the filter for the hardware reset output pin. */
    uint8 HwResetPinFilterCount;          /**< Sets the number of filtered reset events after which the hardware reset output is triggered. */
} Mcu_ResetConfigType;



#if defined(CPU_YTM32B1MC0) || defined(CPU_YTM32B1MD2)
/**
 * @brief          Pcu config type for MC chip.
 * @autosar        N/A
 */
typedef struct
{
    uint8 EnableBitList;
    uint8 LVD5VFilterWidth;                         /**< LVD5V filter width. */
    Mcu_NotificationType LVD5VNotificationPtr;      /**< Pointer to the interrupt function for LVD5V. */
    Mcu_PcuLvdTrimType LVD5VTrim;                   /**< LVD5V detection voltage setting. */
    Mcu_PcuLvdHysteresisType LVD5VHysteresis;       /**< Hysteresis for LVD5V voltage detection. */
} Mcu_PcuLvdConfigType;

#elif !defined (CPU_YTM32B1ME1)                     /** CPU_YTM32B1ME1 not use the fellowing config */
/**
 * @brief          Pcu config type.
 * @autosar        N/A
 */
typedef struct
{
    boolean ResetEnable;                            /**< High voltage detect reset enable */
    boolean HVD11IntEnable;                         /**< HVD11 interrupt enable */
    Mcu_NotificationType HVD11NotificationPtr;      /**< HVD11 interrupt notification fun ptr */
    boolean HVD25IntEnable;                         /**< HVD25 interrupt enable */
    Mcu_NotificationType HVD25NotificationPtr;      /**< HVD25 interrupt notification fun ptr */
    boolean HVD50IntEnable;                         /**< HVD50 interrupt enable */
    Mcu_NotificationType HVD50NotificationPtr;      /**< HVD50 interrupt notification fun ptr */
} Mcu_PcuHvdConfigType;
#endif
/**
 * @brief          Mcu pcu config type (HVD/LVD detect is default enabled by hardware).
 * @autosar        N/A
 */
typedef struct
{
#if defined(CPU_YTM32B1MC0) || defined (CPU_YTM32B1MD2)
    const Mcu_PcuLvdConfigType *LvdConfigPtr;       /**< Lvd config ptr */
#elif defined (CPU_YTM32B1ME1)
    boolean HVD50Enable;
    boolean LVD50Enable;
    boolean LVD12Enable;
    boolean HVDResetEnable;
    boolean LVDResetEnable;
    boolean HVDIntEnable;
    boolean LVDIntEnable;
    boolean PadKeepEnable;
    Mcu_NotificationType HVD50IntNotificationPtr;
    Mcu_NotificationType LVD50IntNotificationPtr;
    Mcu_NotificationType LVD12IntNotificationPtr;
#else
    const Mcu_PcuHvdConfigType *HvdConfigPtr;       /**< Interrupt config ptr */
    boolean FastRecoveryEnable;                     /**< Fast recovery from LPM enable */
#if (MCU_HAS_PKE == STD_ON)
    boolean PadKeepEnable;                          /**< PAD keep enable, ME series chip is not support*/
#endif
#endif
} Mcu_PcuConfigType;

/**
 * @brief          Dem error type, contains Dem error enable and error ID
 * @autosar        N/A
 */
typedef struct
{
    uint32 Enable;                        /**< enabling/disabling the DEM error: Active=STD_ON/ Inactive=STD_OFF */
    uint32 EventId;                       /**< ID of DEM error (0 if STD_OFF)*/
} Mcu_DemErrorType;


/**
 * @brief          DEM error reporting configuration.
 * @details        This structure contains information DEM error reporting
 * @autosar        N/A
 */
typedef struct
{
    Mcu_DemErrorType ErrorClockFailureCfg;          /**< DEM error reporting configuration for clock failure */
    Mcu_DemErrorType ErrorCMUFailureCfg;            /**< DEM error reporting CMU clock failure */
} Mcu_DemConfigType;

/**
 * @brief          Configuration structure for the MCU power configuration
 * @autosar        N/A
 */
typedef struct
{
    const Mcu_PowerModeType *ModeMap;               /**< Pointer to an array of structures containing ModeMap */
} Mcu_PowerConfigType;

/**
 * @brief          Configuration structure for the MCU driver
 * @autosar        N/A
 */
typedef struct
{
    const Mcu_ClockConfigType *ClockConfig;         /**< Pointer to an array of structures containing clock configuration data */
    uint8 ClockConfigNum;                           /**< The number of clock configurations contained in the array pointed by ClockConfig */
    Mcu_RamSectionConfigType *RamSectionConfig;     /**< Pointer to an array of structures containing RAM section configuration data */
    const Mcu_ResetConfigType *ResetConfig;         /**< Pointer to a structure containing reset configuration data */
    uint8 ModeConfigNum;                            /**< Number of power modes that can be configured within this device */
    const Mcu_PowerConfigType *PowerConfig;         /**< Pointer to an array of structures containing power mode configuration data */
    uint8 RamSectionConfigNum;                      /**< Number of RAM sections that are available within this device */
    const Mcu_PcuConfigType *PcuConfig;             /**< Pointer to a structure containing PCU configuration data */
} Mcu_ConfigType;

#ifdef __cplusplus
extern "C"
}
#endif

#endif /* MCU_TYPES_H */

/** @} */

